CILAMCE2017-0426 COMPUTATIONAL METHODS FOR IMAGE PROCESSING AND ANALYSIS

FILTER ARCHITECTURE FOR IMAGE PROCESSING USING NIOS II PROCESSOR AND FPGA

CARLOS CAETANO DE ALMEIDA¹; VORNEI AUGUSTO GRELLA¹; ALEXANDRE TOMAZATI OLIVEIRA¹; EURÍPEDES GUILHERME DE OLIVEIRA NÓBREGA¹; DENIS SILVA LOUBACH¹

¹ UNICAMP

doi:10.20906/CPS/CILAMCE2017-0426

Resumo

This research work introduces a digital signal processing architecture implemented through a field programmable hardware device using ConvNets, which are multiple layer networks containing convolution filter algorithms. Among several possible applications, 2D convolution network image processing may take advantage of the parallelism enabled by FPGA. In this sense, the purpose of this paper is to present a FPGA-based implementation of the ConvNet central part employing NIOS II Altera processor. Comparing the quality of the hardware-processed images with a MATLAB (software-processed), equivalent result motivates the discussion about the architecture adoption for the hardware image processing embedded system development.

Palavras-chave: FPGA; Convolution Networks; Image Processing; NIOS II Processor

Como citar

CARLOS CAETANO DE ALMEIDA; VORNEI AUGUSTO GRELLA; ALEXANDRE TOMAZATI OLIVEIRA; EURÍPEDES GUILHERME DE OLIVEIRA NÓBREGA; DENIS SILVA LOUBACH. “FILTER ARCHITECTURE FOR IMAGE PROCESSING USING NIOS II PROCESSOR AND FPGA”. XXXVIII Ibero-Latin American Congress on Computational Methods in Engineering. CILAMCE2017. 2017. DOI: 10.20906/CPS/CILAMCE2017-0426